A Survey on Quantum Computing Architectures: Implications for Electrical Circuit Design and Optimization

Rishaan Bhatia

doi:10.36948/ijfmr.2024.v06i05.29088

A Survey on Quantum Computing Architectures: Implications for Electrical Circuit Design and Optimization

Author(s)	Rishaan Bhatia
Country	India
Abstract	Quantum computing, a paradigm shift with the potential to revolutionize fields ranging from cryptography to optimization, is rapidly evolving. This survey delves into the key quantum computing architectures—gate-based and quantum annealing—and their profound impact on circuit design and optimization. Gate-based systems, such as those utilizing superconducting qubits and trapped ions, offer versatile platforms capable of executing a broad array of quantum algorithms. However, they present unique challenges for circuit designers, including noise sensitivity, scalability, and the need for complex error correction circuits. Quantum annealing, exemplified by D-Wave systems, offers a more specialized approach to solving optimization problems, requiring distinct circuit design considerations focused on energy efficiency and coherence preservation.This paper reviews the foundational research on these architectures, compares their respective design challenges, and examines the optimization techniques that have emerged in response to these challenges. Gate count reduction, error correction, and hybrid quantum-classical methods are highlighted as key approaches for improving circuit efficiency and scalability in quantum systems. Furthermore, this survey emphasizes the importance of interdisciplinary collaboration between quantum physicists, electrical engineers, and computer scientists to address the complex challenges associated with quantum circuit design. By combining expertise from these fields, researchers can develop innovative solutions that bridge the gap between theoretical concepts and practical hardware implementations. Ultimately, this survey underscores the need for continued innovation at the intersection of quantum computing and electrical engineering, as researchers strive to overcome current limitations and develop practical, large-scale quantum systems that can harness the full potential of this revolutionary technology.
Keywords	Quantum Computing, Quantum Architectures, Gate-Based Quantum Computing, Quantum Annealing, Superconducting Qubits, Trapped Ions, Circuit Design, Quantum Optimization, Fault Tolerance, Noise Management, Scalability, Quantum-Classical Hybrid Systems, Quantum Error Correction, Quantum Circuit Optimization.
Field	Engineering
Published In	Volume 6, Issue 5, September-October 2024
Published On	2024-10-20
Cite This	A Survey on Quantum Computing Architectures: Implications for Electrical Circuit Design and Optimization - Rishaan Bhatia - IJFMR Volume 6, Issue 5, September-October 2024. DOI 10.36948/ijfmr.2024.v06i05.29088
DOI	https://doi.org/10.36948/ijfmr.2024.v06i05.29088
Short DOI	https://doi.org/g8np7s

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A Survey on Quantum Computing Architectures: Implications for Electrical Circuit Design and Optimization

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