Novel Architecture of Fir Lattice Filter with Reduced Interconnect Delay Impacts Towards Reduced Power-delay Product using Pipelining and Parallel Processing for Medical Applications

SUBATHRADEVI S; VENNILA C

doi:10.36948/ijfmr.2023.v05i06.8569

Novel Architecture of Fir Lattice Filter with Reduced Interconnect Delay Impacts Towards Reduced Power-delay Product using Pipelining and Parallel Processing for Medical Applications

Author(s)	SUBATHRADEVI S, VENNILA C
Country	INDIA
Abstract	Three important parameters area, speed and power are important. In VLSI design, the speed is determined by the critical path delay. Delay is depending on the data path taken for processing in the VLSI design. By minimizing data-path delay using efficient architecture the speed of the design of system can be improved in turn to result in better performance. In this new era, data-path delay is the dominating one compared to logic delay. So, it is very essential to concentrate more towards path delay in any architecture design. Even though the speed is important it is having in trade of with power. This data-path delay can be reduced by different technique like pipelining, parallel processing, register retiming. Also, by constructing this architecture in an innovative way the power is having trade of with delay. So the power-delay product can be taken as the reduced one. In this paper, various architecture of delay-product optimized FIR filter and Lattice filter architecture is being surveyed and implemented in order to get minimum delay-power product
Keywords	VLSI, Architecture, FIR filter, Lattice filter, delay, path delay, pipelining, parallel processing, System design.
Field	Engineering
Published In	Volume 5, Issue 6, November-December 2023
Published On	2023-12-03
Cite This	Novel Architecture of Fir Lattice Filter with Reduced Interconnect Delay Impacts Towards Reduced Power-delay Product using Pipelining and Parallel Processing for Medical Applications - SUBATHRADEVI S, VENNILA C - IJFMR Volume 5, Issue 6, November-December 2023. DOI 10.36948/ijfmr.2023.v05i06.8569
DOI	https://doi.org/10.36948/ijfmr.2023.v05i06.8569
Short DOI	https://doi.org/gs7v5f

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Novel Architecture of Fir Lattice Filter with Reduced Interconnect Delay Impacts Towards Reduced Power-delay Product using Pipelining and Parallel Processing for Medical Applications

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